This application relates to semiconductor die packages that contain multiple semiconductor dice.
In semiconductor packages, a semiconductor die is sometimes mounted on a highly heat-conductive (typically metal) die pad that is exposed at the bottom of the package. Particularly when the die contains a device that generates significant amounts of heat—for example, a power MOSFET or other semiconductor power device—the die pad (or metal slug) serves as a thermal conductive path that allows heat generated in the die to flow to the structure on which the package is mounted, typically a printed circuit board (PCB). This helps to prevent the die from overheating, which can damage or destroy the die.
In some cases two or more dice are housed in a single package. For example, a single package may contain a power MOSFET die together with a control die that contains circuitry for turning the power MOSFET off and on. This type of circuit is represented schematically by control die 2 and power MOSFET die 3 shown in FIG. 1. Power MOSFET die 3 contains a power MOSFET 6 whose source and body terminals are shorted together and connected to ground and whose drain terminal is connected to a load 8. The source-body short in MOSFET 6 creates an intrinsic diode 7 that is in parallel with the source-body and drain terminals of MOSFET 6.
MOSFET 6 is controlled by control die 2, which contains a control element 4 and a buffer 5, an output terminal of buffer 5 being connected to the gate terminal of MOSFET 6. As shown, control die 2 is connected between a positive supply voltage VCC and ground.
FIG. 2A illustrates a cross-sectional view of buffer 5 in control die 2, which includes a P substrate 2. Buffer 5 includes an N-channel MOSFET 26A and a P-channel MOSFET 26B, MOSFET 26A being formed in a P-well 23 and MOSFET 26B being formed in an N-well 22, which serve as the body regions of the respective MOSFETs. In MOSFET 26A, an N+ source region 25C and a P+ body contact region 24A are shorted together and connected to ground. In MOSFET 26B, a P+ source region 24C and an N+ body contact region 25A are shorted together and connected to VCC. An N+ drain region 25B of MOSFET 26A and a P+ drain region 24B of MOSFET 26B are connected together and provide an output voltage VOUT that is delivered to the gate terminal of power MOSFET 6. An input voltage VIN from control element 4 is delivered to the respective gate terminals of MOSFETs 26A and 26B. Thus when VIN is high, MOSFET 26A is turned on and MOSFET 26B is turned off and VOUT is approximately equal to ground and when VIN is low, MOSFET 26A is turned off and MOSFET 26B is turned on and VOUT is approximately equal to VCC.
FIG. 2B illustrates a cross-sectional view of MOSFET 6 in die 3, which includes an N+ substrate 31. An N-epitaxial layer 32 is grown on N+ substrate 31. N+ source regions 35, P-body regions 33 and P+ body contact regions 34 are implanted into N-epitaxial layer 32, and trenches 38 are etched from the surface of die 3 through N+ source regions 35 and P-body regions 33. Each of trenches 38 contains a gate terminal 37 and a gate oxide layer 36, which insulates gate terminal 37 from N-epitaxial layer 32. A metal layer 39 overlies the surface of N-epitaxial layer 32 and shorts together N+ source regions 35, P-body regions 33 and P+ body contact regions 34. The N+ substrate 31 represents the drain terminal of MOSFET 6. Consistent with FIG. 1, metal layer 39 (the source-body terminal) is connected to ground and N+ substrate 31 (the drain terminal) is connected to the load 8.
The gate electrodes 37 are accessed in the third dimension, outside the plane of FIG. 2B, and this connection is shown schematically.
Thus power MOSFET 6 is an N-channel MOSFET. VOUT from buffer 5 is connected to gate electrodes 37. When VOUT is high (VCC), MOSFET 6 is turned on; when VOUT is low (ground), the gate-to-source voltage of MOSFET 6 is equal to zero and MOSFET 6 is turned off.
A key aspect of dice 2 and 3 is that in this arrangement the P substrate 21 of die 2 is connected to ground and the N+ substrate 31 of die 3 is connected to the load 8. As shown in FIG. 1, since the source-body terminal of MOSFET 6 is grounded, the N+ substrate 31 (drain) in on the high side of MOSFET 6. As a result, when MOSFET 6 is turned off the voltage at N+ substrate 31 approaches the high voltage (+HV) that drives the load 8.
FIG. 3A shows a cross-sectional view of a conventional semiconductor package 50 containing dice 2 and 3. Die 2 is mounted on a die pad 51B and die 3 is mounted on a die pad 51C. Dice 2 and 3 and die pads 51B and 51C are encased in a capsule 53 made of a molding compound, typically a plastic material. Since power MOSFET 6 generates a significant amount of heat, die pad 51C is exposed at a bottom surface 53B of capsule 53 thereby providing a thermal conduction path for the heat generated in die 3 to escape to the PCB or other structure (not shown) on which package 50 is mounted. Likewise, (lie pad 51B is exposed at the bottom surface 53B of capsule 53. Apart from their thermal functions, die pads 51B and 51C also provide electrical contact to terminals on the bottom surfaces of dice 2 and 3.
The top surface of die 2 is connected via a bonding wire 52A to a contact 51A, and the top surface of die 3 is connected via a bonding wire 52B to a contact 51D. Since package 50 is a “no-lead” type of package, the outside surfaces of contacts 51A and 51D are flush with the bottom surface 53B and side surfaces 53S of capsule 53. Consistent with FIG. 1, bonding wire 52A connects to the source-body terminal of MOSFET 26B, and thus contact 51A is connected to VCC. (Another bonding wire and contact (not shown) connect the source-body terminal of MOSFET 26A to ground.) Bonding wire 52B connects to the source-body terminal of MOSFET 6, and thus contact 51D is connected to ground.
P substrate 21 of die 2 is connected via die pad 51B to ground, and N+ substrate 31 of die 3 is connected via die pad 51C to a voltage that can approach the high voltage +HV. As noted above, both die pad SIB and die pad 51C are exposed at the bottom of package 50.
FIG. 3B is a bottom view of package 50. The exposed bottom surfaces of die pads 51B and 51C as well as the cross-section 3A-3A of FIG. 3A are shown.
Having exposed die pads that may assume different voltages in operation can create problems. When the package is mounted onto a PCB or other supporting structure, bits or pieces of metal or other conductive materials may become trapped between the package and the PCB and may create a short between the die pads. These latent shorts may remain undetected, visually hidden beneath the plastic package. While X-rays may be used to identify the shorts, X-ray inspection is expensive and potentially hazardous to workers.